Alice & Bob will help train PhD researchers in quantum error correction as part of QuBriC, a €4.6 million Horizon Europe-funded doctoral network focused on scalable fault-tolerant quantum computing hardware and software.
Alice & Bob, a developer of cat-qubit quantum hardware, has joined the QuBriC Doctoral Network, a new European initiative dedicated to advancing quantum error correction (QEC) research and workforce training. QuBriC, funded by a €4.6 million grant under the Horizon Europe program, brings together 16 academic institutions and seven quantum technology companies to address the persistent skills gap in fault-tolerant quantum computing. The network will support 15 doctoral candidates over four years, embedding them in both university laboratories and industrial research environments to provide hands-on experience across the full QEC stack.
Cat Qubits and Error Suppression
The central technical contribution from Alice & Bob is its cat-qubit architecture, which leverages bosonic modes to autonomously suppress certain types of physical errors-specifically, bit-flip errors-at the hardware level. This approach aims to reduce the overhead required for logical error correction by minimizing the rate of physical errors before higher-level codes are applied. Doctoral researchers in the network will have the opportunity to work directly with these devices, exploring the co-design of physical quantum processing units (QPUs) and logical QEC layers. The training program is designed to bridge the divide between theoretical quantum information science, classical coding theory, and practical hardware engineering.
Consortium Structure and Industry Partners
QuBriC's consortium includes a mix of leading quantum hardware and software companies-such as Riverlane, IQM, Quantinuum, Pasqal, QuiX Quantum, and Quandela-alongside academic centers including ETH Zürich, TU Delft, University College London, INRIA, and Sorbonne University. The network's structure is intended to expose doctoral candidates to both the theoretical foundations and the engineering realities of scalable quantum computing. By embedding students in both academic and industrial settings, QuBriC aims to accelerate the development of practical fault-tolerant logical qubits and to foster collaboration across the European quantum ecosystem.
Training Across the Quantum Error Correction Stack
The QuBriC program will train researchers in a range of QEC techniques, including classical low-density parity-check (LDPC) codes, surface codes, and hardware-level error suppression strategies. The initiative responds to a recognized shortage of specialists who can integrate classical coding methods with quantum device engineering-a gap that has slowed progress toward scalable, fault-tolerant quantum computers. The program's curriculum is designed to produce graduates capable of contributing to both foundational research and the engineering of next-generation quantum processors. For context on the broader landscape of quantum hardware evaluation and certification, readers may be interested in recent coverage of hardware security audits in quantum key distribution, such as the independent ISO/IEC assessment of Quantum Optics Jena's ELVIS QKD system.
QuBriC's funding covers a 48-month period, with the first cohort of doctoral candidates expected to begin their research placements in the coming year. The program's success will depend on its ability to integrate advances in device physics, error correction theory, and scalable engineering, while also providing practical training that addresses the needs of both academia and industry.
Quantum error correction is a set of techniques that protect quantum information from errors caused by decoherence, noise, and imperfect control. Unlike classical error correction, which can duplicate and check bits, quantum error correction must preserve fragile quantum states without directly measuring them. Physical qubits are the actual quantum systems-such as superconducting circuits, trapped ions, or cat qubits-while logical qubits encode information redundantly across many physical qubits to detect and correct errors. Achieving fault-tolerant quantum computing requires both low physical error rates and efficient error-correcting codes, making the integration of hardware-level suppression and logical QEC a central challenge for the field.
