IonQ, Synopsys, and NVIDIA have linked a trapped-ion quantum processor with large-scale engineering simulation software, reporting up to 14.6% total runtime savings in benchmarked industrial workloads.
Engineering simulations that once took a week on high-performance computers can now finish faster, thanks to a 14.6% reduction in total runtime using a hybrid quantum-classical method. IonQ, Synopsys, and NVIDIA have shown that adding a trapped-ion quantum processor to established computer-aided engineering (CAE) workflows can speed up key computational steps. These results, presented at IEEE Quantum Week 2026, earned a 1st Place Best Paper Award at the conference in Toronto. The work was one of nine peer-reviewed papers from IonQ, reflecting growing interest in hybrid quantum computing for industrial use.
Hybrid quantum integration
The main technical advance is embedding a quantum matrix reordering algorithm into Ansys LS-DYNA, a widely used finite-element simulation tool for automotive, aerospace, and defense design. In these simulations, classical supercomputers often slow down when reordering large sparse matrices-a step needed to optimize memory and computation during numerical factorization. The hybrid workflow uses a trapped-ion quantum processor as an optimizer at the pre-solving stage, finding better sparsity patterns and matrix elimination trees before the main simulation starts. Similar research is underway at MIT and Stanford, where quantum algorithms are being tested for large-scale linear algebra problems in engineering and physics.
This quantum optimization runs once at the start of the workflow, and its benefits add up over long simulations. The method targets the most demanding stages, aiming to cut redundant calculations and memory use in later time steps. Integrating quantum-accelerated graph partitioning and large-scale linear algebra into the Synopsys simulation stack moves beyond isolated quantum benchmarks, and follows broader efforts in the field, as seen in recent Nature publications on hybrid quantum-classical algorithms.
Benchmark results and hardware
Benchmarks used digital models based on real engineering problems. For an automotive crash test and body frame simulation with up to 35 million elements, the hybrid method cut total runtime by 14.6%-saving about a day on a week-long high-performance computing run. Jet engine assembly and fluid impeller simulations, with multi-million node dynamic physics meshes, saw speedups between 5.9% and 12.1%. Industrial drill and sensor component models, which have dense mechanical stress grids, showed steady reductions in memory fill-in and matrix bandwidth.
Numerical simulations ran on up to 150 simulated qubits, with physical validation using IonQ's 36-qubit Forte trapped-ion quantum processing unit (QPU). Across all tested workloads, the quantum-enhanced sorting framework improved runtimes by 5.9% to 14.6%. The companies say these gains directly lower energy use and computing costs for enterprise users running long CAE workflows. The methods and results reflect a trend in quantum engineering research, with similar benchmarking now used at CERN and other labs to test quantum hardware in real scientific workflows.
Classical comparison and workflow impact
The speedup comes from offloading a specific matrix reordering step to the quantum processor, while most of the simulation remains classical. This hybrid approach does not replace classical computing but adds a targeted optimization at a key bottleneck. Since the quantum step runs only once per workflow, its effect is greater in simulations that last days or involve tens of millions of variables. The result is a clear reduction in both runtime and resource use, though the quantum processor's role is currently limited to this one optimization rather than full simulation.
The research was peer reviewed and won first place for best paper at IEEE Quantum Week 2026. The demonstration was validated on IonQ's hardware, but large-scale benchmarks used simulated qubits to model future scaling. For context, IonQ's earlier work on quantum hardware in engineering was reported previously by Science Report. This research is part of a broader program on hybrid quantum computing for industrial workloads, including AI, life sciences, logistics, and simulation, with similar priorities at research centers like NASA and the Max Planck Society.
Engineering limitations and next steps
While the reported runtime savings are notable for industrial users, the quantum processor's role is currently limited to a single algorithmic step. The rest of the simulation pipeline is classical, and the quantum hardware used for physical validation is smaller than the largest simulated benchmarks. The practical impact depends on scaling trapped-ion quantum processors to more qubits with high fidelity and stability, and on integrating quantum algorithms into broader engineering workflows. These challenges are the focus of ongoing research in journals such as Science and at collaborative research centers worldwide.
For now, the evidence supports a targeted quantum speedup in matrix reordering for large-scale CAE simulations, with room for further gains as hardware and algorithms improve. The result is a concrete, peer-reviewed example of hybrid quantum-classical computing in industrial engineering, but it does not show general quantum advantage or full quantum simulation. The next step will be to extend these gains to more complex workflows and to test performance as quantum hardware scales beyond current lab devices.
In quantum computing, a physical qubit is a controllable quantum system-such as a trapped ion-that can be prepared, manipulated, and measured. Logical qubits encode information across several physical qubits to detect and correct errors, but current engineering demonstrations use only physical qubits. This distinction matters: physical qubits are prone to noise and error, while logical qubits are needed for fault-tolerant computation. In this experiment, the quantum processor optimizes a classical workflow, not a full quantum simulation or error-corrected computation. As quantum hardware improves, moving from physical to logical qubits will be key to broader use in science and industry.
