Quobly and qBraid have made public a 15-qubit silicon spin-qubit emulator that models semiconductor noise and native gate constraints before Quobly's first commercial machine, Alloy Pioneer, is expected to reach cloud users by the end of 2026.
Quobly is moving a critical part of its silicon quantum-computing stack into the cloud before its processor is commercially available. Through qBraid Cloud, the French developer is offering Alloy Forge, a hardware-aware emulator designed to show how quantum circuits behave when they encounter the noise, connectivity limits, and gate restrictions of Quobly's planned silicon spin-qubit hardware. The environment is now publicly accessible through qBraid as a way to broaden development access before the company's first commercial machine ships.
Alloy Forge is also tied directly to Quobly's commercialization roadmap for Alloy Pioneer, which the company says is planned for cloud access by the end of 2026. qBraid says its platform now exposes more than 24 quantum-computing technologies, placing Quobly's emulator within a broader multi-platform environment rather than treating it as an isolated software demonstration.
Alloy Forge does not present an idealized register of noiseless qubits. It models a 15-qubit one-dimensional linear array of silicon spin qubits manufactured on 300 mm Fully Depleted Silicon-on-Insulator CMOS technology. The architecture matters because a linear layout limits which qubits can interact directly and makes routing part of the computational cost.
The underlying fabrication approach has a direct connection to Quobly's hardware progress. Independent coverage describes a single chip produced on 300 mm FD-SOI at STMicroelectronics' Crolles facility, with demonstrations of qubit readout and single- and two-qubit gates. Quobly has characterized that result as a transition from quantum-technology development toward the Alloy product roadmap, a shift that places manufacturing integration and productization alongside laboratory device research.
The emulator is built on SpinPulse, Quobly's open-source pulse-level simulation framework. Its default noise model is based on Quobly's empirical semiconductor data and includes non-Markovian noise channels, physical decoherence, and hardware gate errors. Non-Markovian behavior is important because it allows the simulated error process to retain memory of earlier interactions, unlike a simplified model in which every error event is statistically independent. That makes the system more revealing than a generic state-vector simulator when the question is whether an application survives the constraints of a particular device architecture.
The available native gate set consists of the single-qubit RX, RY, and RZ operations alongside the two-qubit RZZ interaction. Users can access the emulator through the open-source qbraid-sdk at the endpoint qbraid:quobly:sim:alloy-forge, without dedicated hardware credentials. The distinction between native operations and abstract algorithmic gates is central to silicon spin-qubit development: a circuit may be mathematically valid while still requiring a costly sequence of physical pulses after compilation.
Research on silicon quantum processors published in a Nature research paper has likewise emphasized the importance of integrating controllable spin qubits with the surrounding device and readout architecture. Alloy Forge does not reproduce every detail of a laboratory apparatus, but its hardware-aware design follows the same scientific principle: device physics and control constraints must be considered together with the abstract quantum algorithm.
Alloy Forge automatically transpiles higher-level circuits into the native RZZ interaction basis. It also applies an error penalty when a circuit requires non-adjacent qubits to communicate across the linear array. This is a practical distinction: an algorithm that looks compact in an abstract circuit diagram can become longer and less reliable after compilation onto a device with restricted connectivity.
That focus on routing places the service in the same engineering category as an earlier silicon-qubit test that examined how quantum hardware fits into classical computing workflows. The two efforts address different problems, but both point to the same constraint: useful quantum systems will depend on control software and classical infrastructure as much as on the qubits themselves. The concern also aligns with hardware-software co-design work associated with institutions such as MIT, where compiler decisions, device topology, and calibration requirements are often treated as connected engineering variables rather than separate layers.
For developers, the intended benefit is continuity. Code tested in Alloy Forge can move toward physical Quobly processors without being rewritten for a completely different abstraction. That does not mean the emulator proves that an application will work on hardware. It means users can expose some likely failure modes earlier, including accumulated noise and the penalties introduced by circuit routing.
The cloud deployment is positioned as a software precursor to Quobly's planned 10-qubit Alloy Pioneer quantum-processing unit. The available material does not provide gate fidelities, coherence times, readout errors, operating temperatures, circuit-depth limits, or measured application results for Alloy Pioneer. Those omissions matter because a simulator can reproduce an assumed or empirically informed noise model, but it cannot substitute for a hardware benchmark across repeated calibrations and devices.
Quobly's current public software strategy therefore demonstrates preparation rather than quantum advantage. Alloy Forge can help researchers quantify how noise accumulates and test compilation choices, yet it does not show that a quantum processor has solved a useful task faster or more accurately than a classical system. Nor does a 15-qubit emulator establish the performance, yield, or manufacturing repeatability of a larger silicon processor.
Quobly was founded in 2022 as a spin-off associated with CEA-Leti and CNRS. Public reporting describes total funding above €160 million, including a €115 million Series A round co-led by Bpifrance, SEALSQ, and STMicroelectronics. The financing and industrial partnerships are relevant to the company's strategy because silicon spin qubits depend not only on quantum-device physics but also on access to mature semiconductor fabrication, packaging, control electronics, and repeatable process development.
Quobly is also distributing its software through qBraid and European cloud provider Scaleway, a dual-track approach aimed at preparing high-performance-computing and enterprise users for possible on-demand access to Alloy Pioneer. The roadmap places the first planned cloud availability of that machine by the end of 2026, but the timing remains a company target rather than an independently demonstrated deployment date.
Its longer-range roadmap targets Very Large-Scale Integration silicon quantum processors with one million physical qubits by 2032. That figure is a roadmap target rather than a demonstrated system. Reaching it would require progress in fabrication yield, device variability, control wiring, calibration, packaging, cryogenic operation, readout, and error correction-none of which is established by cloud access to an emulator alone.
The strongest case for Alloy Forge is narrower and more credible: it gives developers a way to test software against a declared semiconductor architecture before the associated QPU is available. That is valuable infrastructure, but it is not evidence of fault tolerance, logical qubits, commercial quantum advantage, or scalable computation. A physical qubit is one controllable quantum system; a logical qubit requires multiple physical qubits and an error-correction scheme that demonstrably suppresses errors. Alloy Forge models the former hardware environment, while leaving the latter engineering challenge untouched.
