India's five-year silicon photonics programme has entered Phase II, targeting 200 mm wafer design libraries, 1.6 Tbps optical transceivers, microwave photonics above 50 GHz, AI-oriented photonic computing and chip-scale QRNG/QKD circuits.
India is putting ₹99.94 crore behind a silicon photonics programme that aims to connect laboratory photonic integrated-circuit designs with volume manufacturing while reserving a dedicated track for quantum communications. On 7 October 2026, IIT Madras and izmo Microsystems signed a memorandum of understanding for Phase II of the five-year CPPICS programme, moving the effort into practical design, fabrication, testing, packaging and system integration. The work is being run through the Indian Institute of Technology Madras's Centre for Programmable Photonic Integrated Circuits and Systems with semiconductor packaging firm izmo Microsystems Pvt. Ltd.
The Ministry of Electronics and Information Technology will provide ₹97.54 crore of the total outlay, listed as $10.077 million USD, while izmo Microsystems will add ₹2.40 crore or $248,000 USD. The funding is assigned to SPECTRA, short for Silicon Photonics Enabled Cutting-edge Technology Research and Applications, and is intended to move photonic integrated-circuit prototypes toward volume manufacturing.
The central industrial objective is a silicon photonics Process Design Kit for 200 mm wafer platforms. The planned PDK is expected to contain more than 100 IP blocks. In practical terms, that means a reusable library of validated circuit elements that designers can use when developing photonic chips rather than rebuilding every optical function from scratch. A PDK also defines fabrication-aware geometry, material and process constraints, allowing optical designers to work within the limits of a particular manufacturing platform.
Phase II expands the programme into four application areas: optical transceivers for data centres, microwave photonics for wireless communications, quantum photonics and photonic computing for artificial-intelligence workloads. These areas share a common technological foundation-low-loss waveguides, modulators, detectors, lasers or laser interfaces and electronic control-but impose different requirements for bandwidth, linearity, energy efficiency, noise and packaging.
The programme is therefore not an announcement of a finished quantum processor or a deployed quantum network. It is a funded research and engineering effort with manufacturing and integration targets, not a completed commercial system. The distinction is important because the programme's stated metrics are development objectives rather than independently reported experimental results.
Phase II covers high-bandwidth data-centre interconnects through a stated 1.6 Tbps silicon-photonic transceiver engine operating at 1550 nm. The 1550 nm optical window is widely used in fibre communications because silica-fibre attenuation is low there and mature telecom components are available. The programme also targets co-packaged optics for AI compute clusters, where optical interfaces are placed closer to electronic processing hardware to address the growing cost of moving data between processors, memory and network equipment.
Microwave photonics adds a second high-frequency direction, with photonic engines specified for operating frequencies above 50 GHz. In such systems, optical carriers can transport, filter or generate microwave and millimetre-wave signals, potentially reducing some limitations associated with electrical distribution at very high frequencies. The supplied programme information does not provide measured noise figures, spurious-free dynamic range, phase-noise data or demonstrated wireless link performance.
Quantum technology receives its own workstream rather than being treated as a general label for the project. The stated objectives are chip-scale Quantum Random Number Generators and integrated Quantum Key Distribution photonic circuits. QRNG systems use physical measurement processes whose outcomes contain quantum uncertainty, while QKD systems encode cryptographic information in quantum states and require authenticated classical communications alongside optical hardware. Reviews in Nature Photonics have helped establish why source quality, detector behavior, loss and integration are central engineering issues in quantum optical systems.
These are circuit-development goals; the announcement does not provide measured randomness data, secret-key rates, transmission distances, detector efficiencies or evidence of an operational QKD link. A photonic circuit can be designed for quantum communication without establishing that it delivers useful security in a field system. QKD depends on optical loss, source and detector behavior, calibration, classical authentication and implementation security. None of those performance measurements is supplied here.
The work also sits within a wider push to combine photonics with semiconductor control and packaging. An earlier account of a different full-stack photonic effort described in an earlier photonic plan provides useful context for why chip architecture alone does not settle the engineering problem. The broader research landscape includes efforts at institutions such as MIT and IIT Madras, but the present programme should be evaluated by its own fabrication, packaging and measurement results.
izmo Microsystems is assigned the part of the chain that often determines whether a photonic design can leave the wafer. Its responsibilities include precision assembly, fibre alignment and attachment, electronic-photonic IC co-integration and thermal packaging. These tasks connect the fabricated PIC to fibres, electronics and the temperature environment in which the combined system must operate. The company's role also includes assembly intended to be compatible with serial production.
The partnership aims to establish a certified co-packaged-optics design rule and packaging-service capability. The intended pathway runs from foundry chip fabrication to qualified system integration across data centres, telecommunications, defence and quantum-technology sectors. This end-to-end emphasis reflects a basic fact of silicon photonics: optical performance is determined not only by the waveguide and modulator design, but also by coupling, alignment, thermal control, electrical parasitics and assembly repeatability.
That pathway is technically consequential because optical loss, alignment tolerances, thermal behavior and assembly repeatability can erase the benefit of a well-designed circuit. A PDK can standardize design inputs, but it does not by itself establish wafer yield, long-term stability, packaging yield or system-level optical performance. The supplied announcement gives no measurements for those variables.
India's programme also sits alongside the government's National Quantum Mission. That parallel initiative brings together four thematic hubs at IISc Bengaluru, IIT Madras, IIT Bombay and IIT Delhi, with 152 researchers from 43 organisations across 17 states and two union territories. The scale of that network provides a broader institutional setting for quantum communications research, but it should not be confused with completion of SPECTRA.
Authorities have separately reported a hybrid post-quantum-cryptography and QKD channel across 17 protected nodes between Chennai and Bengaluru using an existing BSNL fibre network through the Quantum Communication Hub at IIT Madras. That is a National Quantum Mission result, not evidence that the SPECTRA programme has already delivered a finished network. Keeping the two initiatives distinct prevents a field demonstration from being incorrectly presented as a completed outcome of the newly expanded silicon-photonics project.
The measurable commitments are substantial in scope but limited in evidentiary status: five years of work, ₹99.94 crore in total funding, a target PDK with more than 100 IP blocks, 200 mm wafer platforms, 1.6 Tbps transceivers at 1550 nm and microwave-photonic engines above 50 GHz. The financial split is ₹97.54 crore from MeitY and ₹2.40 crore from izmo Microsystems. These are programme specifications and budget figures rather than experimental results.
There is no claim in the supplied material that the planned QRNG or QKD circuits have already been demonstrated, independently reproduced or certified for deployment. The same caution applies to co-packaged optics, AI photonic-computing hardware and microwave-photonic links. The programme's importance lies in attempting to close the gap between photonic-chip fabrication and qualified assembly, not in proving that the gap has already been closed.
India's strongest move here is to fund the interfaces that determine whether silicon photonics can become a repeatable manufacturing technology. The project links design libraries, wafer-scale processing, fibre attachment, electronic integration and thermal packaging in one programme. That makes it more consequential than a standalone prototype announcement, but its success must be judged by the measurements still absent: reproducible device performance, packaging yield, optical loss, thermal stability, microwave signal quality and validated quantum-communication operation. Until those results appear, SPECTRA is a serious infrastructure bet rather than evidence of a ready quantum product.
A Process Design Kit is best understood as a manufacturing-aware rulebook and component library for a chip technology. It can make designs more repeatable by defining usable building blocks and fabrication constraints, but it does not guarantee that every circuit will work equally well. For this programme, the PDK will matter only if its blocks survive wafer fabrication, optical coupling, electronic integration and thermal packaging with performance that can be measured and reproduced.
