Rigetti Computing, Hewlett Packard Enterprise, and the Pittsburgh Supercomputing Center will build a hybrid quantum-classical testbed integrating a 9-qubit superconducting processor with high-performance computing infrastructure
Rigetti Computing, Hewlett Packard Enterprise (HPE), and the Pittsburgh Supercomputing Center (PSC) have announced a partnership to construct a hybrid quantum-classical testbed named TangleLab. Supported by a $5 million grant from the National Science Foundation, the project aims to integrate a 9-qubit Novera(TM) superconducting quantum processor with classical high-performance computing (HPC) and graphics processing unit (GPU) resources at PSC's new data center. The initiative is designed to provide a platform for benchmarking hybrid quantum-classical workflows, with a focus on scientific research and artificial intelligence applications.
Device Integration and Experimental Focus
The TangleLab testbed will combine Rigetti's 9-qubit Novera(TM) quantum system-based on superconducting qubits operating with gate durations in the 50-70 nanosecond range-with HPE's classical computing infrastructure. This integration is intended to enable low-latency hybrid workflows, where quantum and classical processors interact in real time. The facility will support benchmarking of quantum-classical compiling routines and workload orchestration, allowing researchers to evaluate the performance and limitations of current hybrid approaches under realistic conditions.
Access, Education, and Research Allocation
PSC will manage access to TangleLab through a competitive proposal process, balancing dedicated runtime for individual research projects with real-time access for university courses and educational workshops. To support users without prior quantum experience, the center will provide consulting, training, and onboarding programs. Construction of the testbed is scheduled to begin on September 1, 2026, with full operations expected in 2027. The leadership team includes principal investigators from PSC, HPE, and Rigetti, reflecting a multi-institutional approach to both technical development and research governance.
Benchmarks, Limitations, and National Priorities
The TangleLab project is positioned as an open prototype for integrating quantum hardware into classical cyberinfrastructure, addressing research priorities outlined in the U.S. Office of Science and Technology Policy's guidance for fiscal year 2027. While the 9-qubit Novera(TM) system is not large enough to demonstrate quantum advantage on practical problems, its fast gate speeds and integration with HPC resources will allow for detailed studies of hybrid workflow latency, error sources, and orchestration challenges. The project builds on previous collaborations between Rigetti and HPE, and follows recent deployments of similar quantum hardware at other research institutions. For context, related efforts to link quantum processors with classical and photonic systems have been reported elsewhere, such as the integration of trapped-ion quantum computers with photonic networking infrastructure for regional research and workforce development.
Superconducting quantum processors, such as the Novera(TM) system, operate at cryogenic temperatures and use microwave pulses to manipulate quantum states. Each physical qubit can be controlled individually, with gate fidelities and coherence times that determine the reliability and depth of quantum circuits. In TangleLab, the 9-qubit device will be benchmarked for gate speed, error rates, and integration latency with classical systems. These measurements are essential for understanding the practical limits of current hybrid quantum-classical computing and for informing the design of future, larger-scale systems.
Hybrid quantum-classical computing refers to workflows in which quantum processors are used alongside classical computers to solve problems that neither system can address efficiently alone. In practice, the quantum device handles specific subroutines-such as sampling, optimization, or simulation-while the classical system manages data preparation, postprocessing, and overall orchestration. The effectiveness of this approach depends on the speed and reliability of communication between the two systems, as well as the fidelity and coherence of the quantum hardware. As quantum processors remain limited in size and error rates, hybrid architectures are a focus of current research into near-term applications and system integration challenges.
