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Nanometre Fabrication Shifts Explain Transmon Qubit Performance Gaps

Daisy Shearer Physics and quantum technology editor Science.Report

Post by Daisy Shearer

Nanometre Fabrication Shifts Explain Transmon Qubit Performance Gaps Science.Report © science.report
Nanometre Fabrication Shifts Explain Transmon Qubit Performance Gaps © science.report

A blinded study of 22 superconducting transmons links twofold T1 variation to nanometre-scale oxide and etch differences while finding no clear role for macroscopic surface defects

Nanometre-scale fabrication differences are enough to separate neighboring superconducting transmon qubits by as much as a factor of two in energy-relaxation time. That is the central result of a multi-institution study led by the Fermi National Accelerator Laboratory-led Superconducting Quantum Materials and Systems Center (SQMS).

The work brought together researchers from Fermilab, Northwestern University, Rigetti Computing, the National Institute of Standards and Technology (NIST), Ames National Laboratory and the United Kingdom's National Physical Laboratory. An Ames Laboratory summary describes the effort as a materials-analysis study intended to connect microscopic fabrication conditions with the performance variation that complicates larger quantum processors.

  • Where Qubits Diverge

    The researchers connected variation in T1 to three physical features: shifts of roughly a single nanometre in surface oxide thickness, substrate trench depths below 20 nanometres, and the shape of etched sidewalls. T1 measures how long a qubit retains energy before relaxing. It is not a complete measure of processor quality, but it directly affects the time available for control operations and measurement.

    The finding addresses a practical problem in superconducting quantum hardware. Qubits with the same nominal design can still perform differently when they are fabricated together on one substrate. That device-to-device spread complicates calibration and reduces the predictability of larger processors because a design that works for one element may not produce the same coherence in its neighbours.

    Macroscopic surface defects did not show a clear statistical correlation with degraded performance in this study. The result shifts attention away from defects that are easy to see and towards buried or nanoscale geometry and chemistry at interfaces that are much harder to control during fabrication. The observation does not show that visible defects are harmless in every device architecture; it indicates only that they did not provide a clear statistical explanation for the T1 differences in this set.

    The emphasis on reproducible interfaces places quantum-device fabrication within a wider materials-science concern also seen in research communities at MIT and CERN and in studies reported by Nature. The comparison is about the need to control interfaces and process variability, not a claim that those institutions participated in this SQMS experiment.

  • A Blinded Materials Test

    The team examined 22 transmon devices fabricated by Fermilab, Rigetti and NIST using a blinded workflow. Characterization groups catalogued structural and chemical features before they knew the qubits' coherence results, reducing the risk that investigators would favour features already suspected to explain poor performance.

    The materials work combined seven characterization techniques, including non-destructive and invasive spectroscopy and microscopy. Coherence measurements were performed in the SQMS Quantum Garage and were matched to the materials observations only after characterization was complete. The research was published in Applied Physics Reviews on October 1, 2026.

    This order matters because correlations between a measured device feature and T1 can otherwise be shaped by observer expectations. Here the comparison was made across co-fabricated devices rather than between unrelated chip designs. The study therefore targets process variability directly, although the reported association does not by itself establish that every oxide or sidewall difference has an identical causal effect under all fabrication conditions.

    The available account does not report universal T1 values, p-values, confidence intervals, operating temperatures or wafer-scale yield. Those omissions limit how far the numerical relationships can be generalised, but they do not erase the value of the controlled comparison: the same study population supplied both the materials observations and the coherence measurements.

  • From Diagnosis To Yield

    Rigetti Computing is using the reported parameters to refine lithographic etching and surface-passivation protocols. In practical terms, the work offers process variables that can be monitored and adjusted rather than treating qubit variability as an unexplained property of individual devices.

    That is a more consequential engineering outcome than another isolated coherence record. If nanoscale geometry and surface chemistry account for large differences among neighbouring qubits, improving uniformity could reduce the calibration burden imposed by a processor whose elements do not behave alike. The study does not report a new processor, a logical qubit, an error-correction demonstration, or a fault-tolerant computation.

    The result also fits a larger hardware lesson described in an earlier analysis: raw qubit counts do not determine whether a quantum processor can run reliable workloads. For transmons, coherence is one part of that problem, alongside gate fidelity, readout, connectivity, control stability and the ability to reproduce performance across many devices.

    NASA's spacecraft systems and CERN's detector programmes illustrate a different engineering environment, but they share with quantum computing a dependence on repeatable fabrication and carefully characterised materials. In superconducting processors, that requirement becomes especially demanding because electrically important surfaces and interfaces can occupy a substantial fraction of the device's loss-sensitive environment.

  • The Remaining Constraint

    The study's strength is its combination of blinded characterization with coherence data from the same set of devices. Its reported numerical result is specific: 22 transmons showed up to a twofold T1 spread associated with single-nanometre oxide shifts, trench depths below 20 nanometres and sidewall etch profiles. The available report does not provide a universal T1 value, operating temperature, gate fidelity or wafer-scale yield, so the findings should be read as a materials-level diagnosis rather than a complete production model.

    That limitation is important. A correlation that helps explain variation on one co-fabricated set still has to be translated into repeatable process control across future fabrication runs. The SQMS study gives Rigetti and other hardware developers a sharper target, but it does not remove the need to validate those parameters across broader device populations and manufacturing conditions.

    For readers evaluating quantum hardware claims, T1 is best understood as a clock set by energy relaxation rather than a verdict on a whole machine. A longer T1 can give control sequences more time before energy is lost, but it does not guarantee high-fidelity gates or useful computation. The value of this work lies in making one source of that clock's variation measurable: it turns otherwise hidden nanoscale fabrication differences into engineering variables, which is exactly the kind of evidence the superconducting-qubit field needs before larger systems can become more uniform and dependable.

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