A UCLA-led team has received $4 million from the National Science Foundation to develop a trapped-ion quantum computer architecture aiming for 60 logical qubits, with a focus on error correction and digital quantum simulation beyond classical reach
The National Science Foundation has awarded $4 million to a consortium led by the University of California, Los Angeles, to advance the design of a trapped-ion quantum computer architecture capable of supporting 60 logical qubits. The project, funded under the National Quantum Virtual Laboratory initiative, aims to address the persistent challenge of environmental noise and decoherence that limits current quantum processors. By focusing on logical qubits-quantum bits encoded across multiple physical qubits for error protection-the team seeks to establish a platform for digital quantum simulations that could surpass the capabilities of today's most powerful classical supercomputers.
Trapped-Ion QCCD Architecture
The hardware approach centers on a trapped-ion Quantum Charge-Coupled Device (QCCD) system. In this architecture, individual atomic ions are confined and manipulated on a microfabricated chip, allowing for dynamic shuttling and precise control. The QCCD design enables strong all-to-all connectivity, as ions can be moved to interact for entangling gates and then separated to minimize unwanted crosstalk. High-fidelity gate operations are essential, as even minor errors can accumulate rapidly in quantum circuits. The project's goal is to demonstrate that a full-stack codesign-integrating atomic physics, chip fabrication, control electronics, and quantum software-can reduce the overhead typically required to encode logical qubits, making 60 logical qubits a realistic target within foreseeable hardware constraints.
Error Correction and Engineering Challenges
Quantum error correction (QEC) is central to the project's strategy. Physical qubits are inherently fragile, with coherence times limited by thermal fluctuations, material defects, and electromagnetic noise. Logical qubits are constructed by encoding quantum information redundantly across many physical qubits, enabling real-time detection and correction of errors without destroying the quantum state. Achieving low logical error rates requires not only high-quality physical qubits but also efficient syndrome measurement, fast decoding, and robust control systems. The team will need to optimize the physical trap layout, error-correcting codes, and software compilers in tandem to minimize the number of physical qubits required per logical qubit. This approach is intended to address the scaling bottleneck that has so far limited fault-tolerant quantum computing to small demonstrations.
Consortium and Application Focus
The project brings together researchers from UCLA, UC Berkeley, Cornell University, University of Maryland, and UC Santa Barbara, as well as partners from Georgia Tech Research Institute, SRI International, Quantinuum, Nvidia, Daylight Solutions, and IonQ. The primary application target is digital quantum simulation of complex many-body systems, a task that is widely considered one of the earliest opportunities for quantum computers to demonstrate practical scientific value. Reliable simulation of quantum materials, molecules, and chemical reactions could enable advances in materials science, chemistry, and drug discovery. The open academic framework is designed to expand national access to next-generation quantum testbeds and foster collaboration across disciplines. Recent progress in quantum hardware, such as IBM's demonstration of quantum processors performing classically intractable tasks, highlights the growing importance of robust verification and error correction as quantum systems scale.
Technical Milestones and Remaining Barriers
The consortium's target of 60 logical qubits represents a significant increase over current fault-tolerant demonstrations, which typically involve one or a handful of logical qubits. Achieving this scale will require advances in ion-trap fabrication, control electronics, and error-correction protocols. The project will need to demonstrate sustained high-fidelity gate operations, stable ion shuttling, and efficient real-time decoding of error syndromes. While the roadmap is ambitious, the transition from laboratory prototype to a system capable of outperforming classical supercomputers in digital quantum simulation remains a formidable engineering challenge. The project's success will depend on integrating improvements across hardware, software, and algorithmic layers, as well as on transparent benchmarking and independent verification of logical error rates and simulation results.
Understanding the distinction between physical and logical qubits is essential for evaluating progress in quantum computing. A physical qubit is a single controllable quantum system, such as an atomic ion or superconducting circuit, that can be prepared, manipulated, and measured. However, physical qubits are highly susceptible to errors from environmental noise and control imperfections. Logical qubits are constructed by encoding quantum information across multiple physical qubits using error-correcting codes. This redundancy allows errors to be detected and corrected without collapsing the quantum state, but it comes at the cost of increased hardware overhead. The effectiveness of a logical qubit depends on the quality of the underlying physical qubits, the efficiency of the error-correction code, and the speed and reliability of the control and decoding systems. Demonstrating a large number of logical qubits with low logical error rates is a key milestone on the path to practical fault-tolerant quantum computing.
